//File name  :fifo_port_img_wr.v
//Version    :V1.0
//Abstract   :通过触发控制写一帧Avalon-ST RAW 进FIFO
//Attention  :本模块设计基于这样的假设：fifo的数据不会满（即外部读端口总是及时读走）
module fifo_port_img_wr#(
parameter DWITH = 16      //图像数据位宽
	)(
	input               clk    ,
	input               rst_n  ,
	input               wr_trig,
	output              wr_done,
	//视频接口
	input               sink_sop  ,
	input               sink_eop  ,
	input               sink_valid,
	input [DWITH-1:0]   sink_data ,	 
	//写FIFO接口
	output              fifo_wr   ,
	output [DWITH-1:0]  fifo_data 
	);
wire write_able_w;
assign fifo_wr   = write_able_w && sink_valid;
assign fifo_data = sink_data;
fifo_port_img_wr_fsm u_fifo_port_img_wr_fsm_0
(
	.clk       (clk         ),
	.rst_n     (rst_n       ),
	.sink_sop  (sink_sop    ),
	.sink_valid(sink_valid  ),
	.sink_eop  (sink_eop    ),
	.write_trig(wr_trig     ),//存储一帧的触发信号
	.write_done(wr_done     ),
	.write_able(write_able_w) //代表可以将数据写入fifo的标志，高有效
);
endmodule